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- W2085305721 abstract "A high precision alignment of mask pattern to crystal orientation is essential for fabricating most micro- mechanical devices. With an accurate alignment on a silicon wafer, the time for obtaining a smoothly etched sidewall surface can be reduced and the undercut phenomenon can also be minimized during the anisotropic etching process. In this article, a series of circles are made as an aligning pattern. These circles are evenly distributed at each 0.1 degrees along the same arc of radius 43mm. A wafer is etched in the TMAH solvent for a certain period of time, and the final etched pattern is served as an alignment mark. The present method relies upon the fact that when a (100) silicon wafer is etched for a sufficiently long period of time in an orientation-dependent etchant through a circular window, the etched out portion will form a cavity of pyramidal shape with its surfaces along the (110) directions because the etching process is almost stopped at the (111) planes. However, this pyramidal cavity will continue to grow along the (111) direction when the etching process is continued. This is caused by the undercut phenomenon occurred at the contact line of the passivation layer and the Si substrate. Despite of the circular window used on the passivation layer, the top view of the pyramidal cavity caused by undercut on the Si substrate will be a square opening. Through a visual inspection from the top view, one can find that the corners of some neighboring square openings contact to each other but some are not after a sufficient time of etching. The contact proximity at the corners of two neighboring square openings is taken as an accurate rule for the wafer's alignment. Such a pre-aligning pattern allows one to determine the (100) orientation within accuracy of 0.05 degrees." @default.
- W2085305721 created "2016-06-24" @default.
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- W2085305721 date "2000-08-25" @default.
- W2085305721 modified "2023-09-23" @default.
- W2085305721 title "<title>Precise mask alignment design to crystal orientation of (100) silicon wafer using wet anisotropic etching</title>" @default.
- W2085305721 doi "https://doi.org/10.1117/12.396466" @default.
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