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- W4362465312 abstract "Approximate multipliers have gradually become a focus of research due to the emergence of fault-tolerant applications. This paper deals with the approximation methods for an approximation multiplier with truncation, probability transformation and a majority gate-based compressor chain. With the help of probability analysis, the proposed approximation methods are utilized in an approximate [Formula: see text] unsigned multiplier to achieve low accuracy loss, high efficiency for time and power. Compared with the precise and approximate multipliers, the proposed design brings 55.0%, 39.0% reduction in delay and 73.8%, 22.6% power saving. The proposed multiplier achieves better peak signal-to-noise ratio (PSNR) values when evaluated with an image processing application." @default.
- W4362465312 created "2023-04-05" @default.
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- W4362465312 date "2023-03-31" @default.
- W4362465312 modified "2023-09-26" @default.
- W4362465312 title "Design of an Approximate Multiplier with Time and Power Efficient Approximation Methods" @default.
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- W4362465312 doi "https://doi.org/10.1142/s0218126623502481" @default.
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