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- W1183703466 abstract "The goal of this work is the design and implementation of a low-cost system-on-FPGA for handwritten digit recognition, based on a relatively deep and wide network of perceptrons. In order to increase the performance of the application on embedded processors whose performances are way below standard general purpose CPUs, a regularization method was used during the training phase of the neural network that allows for the drastic reduction of floating point operations. Our implementation achieves a 3 × speed-up toward a raw implementation without optimization, while keeping the accuracy in acceptable ranges. Our efforts reinforce the fact that FPGAs are suited for deploying complex artificial intelligence modules." @default.
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- W1183703466 date "2015-11-01" @default.
- W1183703466 modified "2023-09-29" @default.
- W1183703466 title "An embedded system for handwritten digit recognition" @default.
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- W1183703466 doi "https://doi.org/10.1016/j.sysarc.2015.07.015" @default.
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