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- W129292721 abstract "AbstractIn this work a novel approach to automatically generate hardware is introduced that allows accelerated simulation of artificial neural networks (ANN) on field-programming gate arrays (FPGAs). A compiler architecture has been designed that primarily aims at reducing the development effort for non-hardware developers. This is done by implementing automatic generation of accordingly adjusted hardware processors. Deduced from high-level OpenCL source code, the processors are able to spatially map ANNs in a massive parallel fashion." @default.
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- W129292721 date "2012-01-01" @default.
- W129292721 modified "2023-09-27" @default.
- W129292721 title "Cyfield-RISP: Generating Dynamic Instruction Set Processors for Reconfigurable Hardware Using OpenCL" @default.
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- W129292721 doi "https://doi.org/10.1007/978-3-642-33269-2_22" @default.
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