FRINK Linked Data Fragments server

Matches in SemOpenAlex for { <https://semopenalex.org/work/W135736103> ?p ?o ?g. }

• W135736103 abstract "With the steady progress of high performance electronic systems, the complexity of the electronic systems grows continuously and new features like high-speed, low power and low cost, become the key issues. The interconnection in the electronic systems distributes the power, clock and transfers the electrical signals among numerous components. As the feature size of microelectronic technology becomes smaller, the design and analysis of the interconnection are more important for the performance and cost of the system. The escape routing design is a new important problem in the interconnection design because the number of chip/package input/output (I/O) pins has continuously been growing for high-speed high-performance system. The traditional escape routing strategy and several improvements, pins/pads special placement and routing resource exploration, could not handle large number of I/Os efficiently and usually require increased cost. We introduce a novel concept, escape sequence, develop efficient escape routing strategies based on the new concept and model the escaping wires using 3D extraction. (1) For square grid array, we formulate and solve a maximum flow problem to analyze the escape bottleneck in area array. The layer count can be decreased dramatically by optimizing the I/O escape sequence. Two new escape routing strategies, central triangular escape routing and two-sided escape routing, are proposed and the number of escape routing layers could be reduced dramatically. We implement an automatic escape routing program to verify our analysis and to compare different escape sequence strategies. The escaping wires could be modeled as frequency dependent RLGC circuit for signal performance analysis. (2) For hexagonal area array, we analyze its preponderant properties that the hexagonal array could increase the density of I/Os in the array remarkably. We propose three escape routing strategies for the hexagonal array: column-by-column horizontal escape routing, two-sided horizontal/vertical escape routing, and multi-direction hybrid channel escape routing. We can escape I/Os in the hexagonal array in the same or less number of routing layers compared with square grid array. Therefore, we could reduce the number of escape routing layers as well as increase the density of I/Os. The eye diagram prediction is an important problem in the interconnection analysis because an eye diagram provides the most fundamental and intuitive view to evaluate the signal quality of high-speed communication. The traditional method to obtain the eye diagram involves performing a time domain simulation. It requires a very long simulation time and usually could not accurately characterize the communication systems because the limited length pseudorandom bit sequence (PRBS) as the input stimulus. Several eye diagram prediction methods, analytical techniques, analysis based on unit pulse response and analysis based on step response, have their application constraints because of their assumptions and usually could not handle general systems. We introduce an efficient and accurate method, the accumulative prediction method, to predict the eye diagram for high-speed signaling systems. We use the step response of the signaling system to extract the worst-case eye diagram, including the eye opening and timing jitter. Furthermore, this method generates the input data patterns which produce the worst-case inter-symbol interference. The main advantage is that this general-purpose method can handle signals with asymmetric as well as symmetric rise/fall time. Furthermore, the complexity of the proposed method is linear O(n), where n is the number of time points of step response. This method can be applied to analyze the signal performance in escape routing. It is very useful to analyze various high speed signaling systems." @default.
• W135736103 created "2016-06-24" @default.
• W135736103 creator A5057850013 @default.
• W135736103 creator A5065696575 @default.
• W135736103 date "2008-01-01" @default.
• W135736103 modified "2023-09-28" @default.
• W135736103 title "Off-chip wire distribution and signal analysis" @default.
• W135736103 hasPublicationYear "2008" @default.
• W135736103 type Work @default.
• W135736103 sameAs 135736103 @default.
• W135736103 citedByCount "0" @default.
• W135736103 crossrefType "journal-article" @default.
• W135736103 hasAuthorship W135736103A5057850013 @default.
• W135736103 hasAuthorship W135736103A5065696575 @default.
• W135736103 hasConcept C104954878 @default.
• W135736103 hasConcept C120314980 @default.
• W135736103 hasConcept C123745756 @default.
• W135736103 hasConcept C149635348 @default.
• W135736103 hasConcept C173608175 @default.
• W135736103 hasConcept C204948658 @default.
• W135736103 hasConcept C2780513914 @default.
• W135736103 hasConcept C31258907 @default.
• W135736103 hasConcept C41008148 @default.
• W135736103 hasConcept C74172769 @default.
• W135736103 hasConcept C76522221 @default.
• W135736103 hasConceptScore W135736103C104954878 @default.
• W135736103 hasConceptScore W135736103C120314980 @default.
• W135736103 hasConceptScore W135736103C123745756 @default.
• W135736103 hasConceptScore W135736103C149635348 @default.
• W135736103 hasConceptScore W135736103C173608175 @default.
• W135736103 hasConceptScore W135736103C204948658 @default.
• W135736103 hasConceptScore W135736103C2780513914 @default.
• W135736103 hasConceptScore W135736103C31258907 @default.
• W135736103 hasConceptScore W135736103C41008148 @default.
• W135736103 hasConceptScore W135736103C74172769 @default.
• W135736103 hasConceptScore W135736103C76522221 @default.
• W135736103 hasOpenAccess W135736103 @default.
• W135736103 hasRelatedWork W1514607925 @default.
• W135736103 hasRelatedWork W1559159713 @default.
• W135736103 hasRelatedWork W1988129797 @default.
• W135736103 hasRelatedWork W1993501252 @default.
• W135736103 hasRelatedWork W1993820970 @default.
• W135736103 hasRelatedWork W2007899100 @default.
• W135736103 hasRelatedWork W2019379899 @default.
• W135736103 hasRelatedWork W2029051066 @default.
• W135736103 hasRelatedWork W2128732569 @default.
• W135736103 hasRelatedWork W2141558797 @default.
• W135736103 hasRelatedWork W2153818691 @default.
• W135736103 hasRelatedWork W2164262479 @default.
• W135736103 hasRelatedWork W222903829 @default.
• W135736103 hasRelatedWork W2294938759 @default.
• W135736103 hasRelatedWork W2401845408 @default.
• W135736103 hasRelatedWork W2739568266 @default.
• W135736103 hasRelatedWork W2900284948 @default.
• W135736103 hasRelatedWork W2997962048 @default.
• W135736103 hasRelatedWork W3154548897 @default.
• W135736103 hasRelatedWork W2148012448 @default.
• W135736103 isParatext "false" @default.
• W135736103 isRetracted "false" @default.
• W135736103 magId "135736103" @default.
• W135736103 workType "article" @default.