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• W1480595945 abstract "The aim of this work is to quantitatively investigate the physical origin of the temperature-dependent dynamic R on in GaN based power transistors grown on silicon substrate. The analysis is based on combined trapping/detrapping measurements. Trapping was induced by exposing the devices to two different bias points: off-state bias (V GS =−10 V, V DS =100 V, and V B =0 V), and backgating bias (V GS =0 V, V DS =0 V, and V B =−100 V). The experimental data collected within this paper demonstrate the following relevant results: (i) when submitted to high temperature levels, dynamic R on shows a significant increase; (ii) combined off-state stress and backgating tests suggest that trapping proceeds through the injection of electrons from the buffer towards traps located in the GaN, next to the channel region; (iii) the temperature-dependent dynamic R on can be significantly reduced through the optimization of the growth and fabrication process." @default.
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• W1480595945 date "2015-04-01" @default.
• W1480595945 modified "2023-09-27" @default.
• W1480595945 title "Evidence for temperature-dependent buffer-induced trapping in GaN-on-silicon power transistors" @default.
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• W1480595945 doi "https://doi.org/10.1109/irps.2015.7112687" @default.
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