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• W1483173851 abstract "Reversible circuits, which permute the set of input vectors, have potential applications in nanocomputing [3], low power design [1], digital signal processing [6], and quantum computing [4]. This paper shows that given a reversible circuit C and a set of wires F of C, it is NP-hard to generate a minimum complete test set for stuck-at faults on F . A gate is reversible if the Boolean function it computes is bijective. If a reversible gate has k input and output wires, it is called a k × k gate, or a gate on k wires. A circuit is reversible if all gates are reversible and are interconnected without fanout or feedback. If a reversible circuit has n input and output wires, it is called an n × n circuit. We shall focus our attention to detecting faults in a reversible circuit C which cause wires to be stuckat-0 or stuck-at-1. Let L(C) be the set of all possible fault locations in C. L(C) consists of all input and output wires of C, and input wires to gates in C. For an n × n reversible circuit C, a test is an input vector in {0, 1}. A set of tests that detects all faults on F ⊆ L(C) is said to be complete for F . Let S (C) be the minimum cardinality of a complete test set for F . We denote S (C) by S∗(C) if F = L(C). A k-CNOT gate is a reversible gate on k + 1 wires. It passes some k inputs, referred to as control bits, to the outputs unchanged, and inverts the remaining input, referred to as target bit, if the control bits are all 1. The 0-CNOT gate is just an ordinary NOT gate. A CNOT gate is a k-CNOT gate for some k. Some CNOT gates are shown in Fig. 1, where a control bit and target bit are denoted by a black dot and ring-sum, respectively. A CNOT circuit is a reversible circuit consisting of only CNOT gates. Since the 2-CNOT gate can implement the NAND function, any Boolean function can be implemented by a CNOT circuit. It is shown in [2] that S∗(C) = O(log |L(C)|) for any reversible circuit C. Moreover, it is shown in [5] that S∗(C) ≤ n if C is an n × n CNOT circuit with no 0-CNOT or 1-CNOT gates. We show in this paper that it is NP-hard to compute S (C) for a given CNOT circuit C and F ⊆ L(C). Let" @default.
• W1483173851 created "2016-06-24" @default.
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• W1483173851 date "2005-11-03" @default.
• W1483173851 modified "2023-09-27" @default.
• W1483173851 title "On the Complexity of Fault Testing for Reversible Circuits" @default.
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