Matches in SemOpenAlex for { <https://semopenalex.org/work/W1488677560> ?p ?o ?g. }
Showing items 1 to 66 of
66
with 100 items per page.
- W1488677560 abstract "To achieve high performance, the structure of on-chip memory in a single-chip computer must be appropriate, and it must be allocated effectively to minimize off-chip communication. Since the off-chip memory bandwidth of single-chip computers is severely limited, data caches that exploit spatial locality to achieve high hit rates are not appropriate. A register file, which can be managed by compilers, might be more effective than a data cache as an on-chip memory structure. With a load/store architecture, compilers can separate operand fetches from their use by scheduling code, thus achieving high hit rates without increasing memory traffic. Register allocation also exploits temporal locality better than a data cache does.This thesis investigates how effective register allocation could be and studies the interdependency problem between register allocation and code scheduling. A model of perfect register allocation is explored. An algorithm for optimal local register allocation is then developed. Since the optimal algorithm needs exponential time in the worst case, a heuristic algorithm which has near-optimal performance is proposed and compared with other existing heuristic algorithms. Through trace simulation, the perfect register allocation model is shown to be much more effective in reducing off-chip memory traffic than cache memory of the same size.Code scheduling interferes with register allocation, especially for large basic blocks. Two methods are proposed to solve this interference: (1) an integrated code scheduling technique; and (2) a DAG-driven register allocator. The integrated code scheduling method combines two scheduling techniques--one to reduce pipeline delays and the other to minimize register usage--into a single phase. By keeping track of the number of available registers, the scheduler can choose the appropriate scheduling technique to schedule a better code sequence. The DAG-driven register allocator uses the Dependency DAG to assist in assigning registers; it introduces much less extra dependency than does an ordinary register allocator. Both approaches are shown to generate more efficient code sequences than conventional techniques in the simulations." @default.
- W1488677560 created "2016-06-24" @default.
- W1488677560 creator A5017207899 @default.
- W1488677560 date "1987-01-01" @default.
- W1488677560 modified "2023-09-26" @default.
- W1488677560 title "Register allocation and code scheduling for load/store architectures" @default.
- W1488677560 hasPublicationYear "1987" @default.
- W1488677560 type Work @default.
- W1488677560 sameAs 1488677560 @default.
- W1488677560 citedByCount "6" @default.
- W1488677560 countsByYear W14886775602014 @default.
- W1488677560 crossrefType "journal-article" @default.
- W1488677560 hasAuthorship W1488677560A5017207899 @default.
- W1488677560 hasConcept C111919701 @default.
- W1488677560 hasConcept C115537543 @default.
- W1488677560 hasConcept C128916667 @default.
- W1488677560 hasConcept C153247305 @default.
- W1488677560 hasConcept C162262903 @default.
- W1488677560 hasConcept C162324750 @default.
- W1488677560 hasConcept C169590947 @default.
- W1488677560 hasConcept C173608175 @default.
- W1488677560 hasConcept C206729178 @default.
- W1488677560 hasConcept C21547014 @default.
- W1488677560 hasConcept C2871975 @default.
- W1488677560 hasConcept C41008148 @default.
- W1488677560 hasConcept C98986596 @default.
- W1488677560 hasConceptScore W1488677560C111919701 @default.
- W1488677560 hasConceptScore W1488677560C115537543 @default.
- W1488677560 hasConceptScore W1488677560C128916667 @default.
- W1488677560 hasConceptScore W1488677560C153247305 @default.
- W1488677560 hasConceptScore W1488677560C162262903 @default.
- W1488677560 hasConceptScore W1488677560C162324750 @default.
- W1488677560 hasConceptScore W1488677560C169590947 @default.
- W1488677560 hasConceptScore W1488677560C173608175 @default.
- W1488677560 hasConceptScore W1488677560C206729178 @default.
- W1488677560 hasConceptScore W1488677560C21547014 @default.
- W1488677560 hasConceptScore W1488677560C2871975 @default.
- W1488677560 hasConceptScore W1488677560C41008148 @default.
- W1488677560 hasConceptScore W1488677560C98986596 @default.
- W1488677560 hasLocation W14886775601 @default.
- W1488677560 hasOpenAccess W1488677560 @default.
- W1488677560 hasPrimaryLocation W14886775601 @default.
- W1488677560 hasRelatedWork W1491378777 @default.
- W1488677560 hasRelatedWork W1529768310 @default.
- W1488677560 hasRelatedWork W1540718544 @default.
- W1488677560 hasRelatedWork W1572089978 @default.
- W1488677560 hasRelatedWork W1596795436 @default.
- W1488677560 hasRelatedWork W182448324 @default.
- W1488677560 hasRelatedWork W2000718530 @default.
- W1488677560 hasRelatedWork W2040167141 @default.
- W1488677560 hasRelatedWork W2048936605 @default.
- W1488677560 hasRelatedWork W2121624795 @default.
- W1488677560 hasRelatedWork W2130747473 @default.
- W1488677560 hasRelatedWork W2152324051 @default.
- W1488677560 hasRelatedWork W2169528027 @default.
- W1488677560 hasRelatedWork W2171595223 @default.
- W1488677560 hasRelatedWork W2269159438 @default.
- W1488677560 hasRelatedWork W2349934444 @default.
- W1488677560 hasRelatedWork W2380920873 @default.
- W1488677560 hasRelatedWork W2388891635 @default.
- W1488677560 hasRelatedWork W5670727 @default.
- W1488677560 hasRelatedWork W2122787472 @default.
- W1488677560 isParatext "false" @default.
- W1488677560 isRetracted "false" @default.
- W1488677560 magId "1488677560" @default.
- W1488677560 workType "article" @default.