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- W1489597939 abstract "The Multichip LSI (MCL) comprised of both an embedded 123MHz CPU and a 64Mb memory in one package is introduced. 1300 signal lines are directly connected by microbumps between the two chips and achieve 160Gb/s signal interface performance. Both the CPU and memory are fabricated in a 0.15/spl mu/m CMOS technology." @default.
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- W1489597939 date "2004-09-28" @default.
- W1489597939 modified "2023-09-26" @default.
- W1489597939 title "A 160Gb/s interface design configuration for multichip LSI" @default.
- W1489597939 cites W2009552442 @default.
- W1489597939 doi "https://doi.org/10.1109/isscc.2004.1332633" @default.
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