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- W1489728615 abstract "A versatile I/O buffer is proposed to interface DDR/DDR2/GDDR3 memory types. A new robust impedance calibration scheme which fills the role of off-chip driver (OCD) and on-die terminator (ODT) for improving signal integrity is introduced. The proposed calibration scheme minimizes quantization error and maintains 30/spl sim/300/spl Omega/ impedance within 3% variations." @default.
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- W1489728615 date "2006-09-22" @default.
- W1489728615 modified "2023-09-24" @default.
- W1489728615 title "A versatile I/O with robust impedance calibration for various memory interfaces" @default.
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- W1489728615 doi "https://doi.org/10.1109/iscas.2006.1692757" @default.
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