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- W1492242795 abstract "The authors present a mesh systolic array, GCN (giga connection), for a fast simulator of artificial neural networks (ANNs). The processor element (PE) of the GCN is composed of the RISC processor i-860 designed by Intel Corp., a large scale local memory, and high bandwidth first-in first-out devices. The mapping algorithm of the ANN onto the GCN, called the net-data partition, is discussed, and the multilayer feedforward network and Kohenen feature map are mapped onto the GCN by using this algorithm. Another parallelism that can be used for a stochastic ANN like the Boltzmann machine is also discussed. The performance of the GCN is evaluated by software simulation and the authors achieve over 1 gigaconnection per second using 128 PEs. >" @default.
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- W1492242795 date "2002-12-04" @default.
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- W1492242795 title "Implementation of ANN on RISC processor array" @default.
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- W1492242795 doi "https://doi.org/10.1109/asap.1990.145502" @default.
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