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- W1497342595 abstract "High performance, low power and low cost will continue to be driving factors for digital signal processor (DSP) and embedded computer systems of the future. Recent improvements of semiconductor technology have led to faster circuits, higher density, and smaller dimensions. However, along with technology scaling there are still many difficult challenges for future electronic and computer system design, one of them is power consumption. There is a lot of research efforts dedicated for reducing both dynamic and static power consumption in all the designlevels ranging from the circuit-level to the architecture-level and the algorithm-level. In all these levels performance-power simulation/estimation tools play a very important, even decisive role. This thesis describes in detail our ongoing research work on designing and im-plementing an architecture-level cycle-accurate power-performance simulator for parallel DSP architectures (DSP-PP). The DSP-PP uses the suggested White-box Table-based Total Power Consumption (WTTPC) estimation approach offering both rapid and accurate architectural level power estimation models for proces-sorcomponents with regular structures (such as SRAM arrays) based on tables of power values. This approach offers relatively simple high-accuracy architecture-levelpower estimation models accounting for both dynamic and static power consumption. The DSP-PP simulator, implemented using C++ and SystemC libraries, simulatesan extended version of the ManArray parallel DSP architecture. DSP-PP produces performance data (i.e. number of clock cycles) and power estimateswhile running executable programs. By varying the configuration of the architecture, the user can rapidly explore the power and performance design space." @default.
- W1497342595 created "2016-06-24" @default.
- W1497342595 creator A5062139748 @default.
- W1497342595 date "2005-01-01" @default.
- W1497342595 modified "2023-09-27" @default.
- W1497342595 title "Towards a Power and Performance Simulation Framework for Parallel DSP Architecture" @default.
- W1497342595 cites W1499398507 @default.
- W1497342595 cites W1547343473 @default.
- W1497342595 cites W156688124 @default.
- W1497342595 cites W1570256175 @default.
- W1497342595 cites W1578629932 @default.
- W1497342595 cites W1605338924 @default.
- W1497342595 cites W1746797279 @default.
- W1497342595 cites W2011992756 @default.
- W1497342595 cites W2051963854 @default.
- W1497342595 cites W2070015279 @default.
- W1497342595 cites W2097117297 @default.
- W1497342595 cites W2098958054 @default.
- W1497342595 cites W2102727118 @default.
- W1497342595 cites W2104225326 @default.
- W1497342595 cites W2110134128 @default.
- W1497342595 cites W2112692144 @default.
- W1497342595 cites W2116723427 @default.
- W1497342595 cites W2120635877 @default.
- W1497342595 cites W2125263803 @default.
- W1497342595 cites W2125858563 @default.
- W1497342595 cites W2131507936 @default.
- W1497342595 cites W2132324656 @default.
- W1497342595 cites W2132441656 @default.
- W1497342595 cites W2135874222 @default.
- W1497342595 cites W2142671730 @default.
- W1497342595 cites W2144293278 @default.
- W1497342595 cites W2148595980 @default.
- W1497342595 cites W2156476900 @default.
- W1497342595 cites W2163881957 @default.
- W1497342595 cites W2167614890 @default.
- W1497342595 cites W2169263481 @default.
- W1497342595 cites W301945432 @default.
- W1497342595 cites W2161084136 @default.
- W1497342595 hasPublicationYear "2005" @default.
- W1497342595 type Work @default.
- W1497342595 sameAs 1497342595 @default.
- W1497342595 citedByCount "0" @default.
- W1497342595 crossrefType "dissertation" @default.
- W1497342595 hasAuthorship W1497342595A5062139748 @default.
- W1497342595 hasConcept C107598950 @default.
- W1497342595 hasConcept C111919701 @default.
- W1497342595 hasConcept C118524514 @default.
- W1497342595 hasConcept C121332964 @default.
- W1497342595 hasConcept C149635348 @default.
- W1497342595 hasConcept C160145156 @default.
- W1497342595 hasConcept C161611012 @default.
- W1497342595 hasConcept C163258240 @default.
- W1497342595 hasConcept C2776928060 @default.
- W1497342595 hasConcept C41008148 @default.
- W1497342595 hasConcept C45872418 @default.
- W1497342595 hasConcept C62520636 @default.
- W1497342595 hasConcept C84462506 @default.
- W1497342595 hasConcept C9390403 @default.
- W1497342595 hasConceptScore W1497342595C107598950 @default.
- W1497342595 hasConceptScore W1497342595C111919701 @default.
- W1497342595 hasConceptScore W1497342595C118524514 @default.
- W1497342595 hasConceptScore W1497342595C121332964 @default.
- W1497342595 hasConceptScore W1497342595C149635348 @default.
- W1497342595 hasConceptScore W1497342595C160145156 @default.
- W1497342595 hasConceptScore W1497342595C161611012 @default.
- W1497342595 hasConceptScore W1497342595C163258240 @default.
- W1497342595 hasConceptScore W1497342595C2776928060 @default.
- W1497342595 hasConceptScore W1497342595C41008148 @default.
- W1497342595 hasConceptScore W1497342595C45872418 @default.
- W1497342595 hasConceptScore W1497342595C62520636 @default.
- W1497342595 hasConceptScore W1497342595C84462506 @default.
- W1497342595 hasConceptScore W1497342595C9390403 @default.
- W1497342595 hasLocation W14973425951 @default.
- W1497342595 hasOpenAccess W1497342595 @default.
- W1497342595 hasPrimaryLocation W14973425951 @default.
- W1497342595 hasRelatedWork W1580149952 @default.
- W1497342595 hasRelatedWork W1990620171 @default.
- W1497342595 hasRelatedWork W2039624814 @default.
- W1497342595 hasRelatedWork W2056658172 @default.
- W1497342595 hasRelatedWork W2062734222 @default.
- W1497342595 hasRelatedWork W2086297617 @default.
- W1497342595 hasRelatedWork W2092819586 @default.
- W1497342595 hasRelatedWork W2157281876 @default.
- W1497342595 hasRelatedWork W2165091228 @default.
- W1497342595 hasRelatedWork W2170143089 @default.
- W1497342595 hasRelatedWork W2259595829 @default.
- W1497342595 hasRelatedWork W2439833907 @default.
- W1497342595 hasRelatedWork W2540350541 @default.
- W1497342595 hasRelatedWork W2728213123 @default.
- W1497342595 hasRelatedWork W2988335423 @default.
- W1497342595 hasRelatedWork W3140327969 @default.
- W1497342595 hasRelatedWork W2136951544 @default.
- W1497342595 hasRelatedWork W2407012739 @default.
- W1497342595 hasRelatedWork W2480205054 @default.
- W1497342595 hasRelatedWork W2552583714 @default.
- W1497342595 isParatext "false" @default.
- W1497342595 isRetracted "false" @default.
- W1497342595 magId "1497342595" @default.
- W1497342595 workType "dissertation" @default.