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- W1500528089 abstract "A new device concept for variable /spl gamma/ FD (Fully-Depleted) SOI MOSFET is proposed by changing substrate depletion layer capacitance. Also a semi-planar 3D-gate SOI MOSFET is proposed, where both sufficient /spl gamma/ and good short effect immunity (SCE) is attained. These two device concepts are proposed for the future VLSI applications. The features of the proposed devices are: utilisation of substrate depletion layer below BOX (buried oxide), three-dimensional gate structure, and low aspect-ratio channel. The problems of standby power consumption, characteristic fluctuations, and performance degradation are solved. Three-dimensional simulation results of these devices are studied." @default.
- W1500528089 created "2016-06-24" @default.
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- W1500528089 date "2004-07-08" @default.
- W1500528089 modified "2023-09-26" @default.
- W1500528089 title "Low-power device design of fully-depleted SOI MOSFETs" @default.
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- W1500528089 doi "https://doi.org/10.1109/isdrs.2003.1272148" @default.
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