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W1502829645 abstract "We report pulsed high-k gate dielectric breakdown in various configurations emulating ESD stress in real input/output circuits. The stress on the receiver is of greater concern than is stress on the driver due to different gate oxide areas under stress. Methods to improve pad voltage tolerance for gate oxide breakdown are proposed." @default.
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W1502829645 date "2010-11-09" @default.
W1502829645 modified "2023-09-24" @default.
W1502829645 title "Pulsed gate dielectric breakdown in a 32 nm technology under different ESD stress configurations" @default.
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