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- W1504585063 abstract "Sub-binary-weighted current circuits make possible low-power and small-area calibration circuits for a low-supply-voltage two-step subranging analog-to-digital converter (ADC). Placed in the calibration circuits, they can be 71% smaller than conventional replica circuits. Moreover, they make it possible to calibrate only one time before A/D conversions, because they can hold the calibrated data during A/D conversions. Consequently, the mean power of calibration circuits can be greatly reduced. The power dissipation of calibration circuits during A/D conversions is only 0.5 mW, and the area is 0.036 mm2, which is 2.3% of the ADC core. The effectiveness of this technique has been demonstrated with a 2.5V 100MS/s 8bit ADC." @default.
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- W1504585063 date "1998-01-01" @default.
- W1504585063 modified "2023-09-23" @default.
- W1504585063 title "A sub–binary–weighted current calibration technique for a 2.5V 100MS/s 8bit ADC" @default.
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- W1504585063 doi "https://doi.org/10.1109/esscir.1998.186298" @default.
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