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• W1513422997 abstract "MANAGING LITHOGRAPHIC VARIATIONS IN DESIGN, RELIABILITY & TEST USING STATISTICAL TECHNIQUES FEBRUARY 2011 ASWIN SREEDHAR B.E., ANNA UNIVERSITY M.S. E.C.E, UNIVERSITY OF MASSACHUSETTS AMHERST Ph.D., UNIVERSITY OF MASSACHUSETTS AMHERST Directed by: Professor Sandip Kundu Much of today’s high performance computing engines and hand-held mobile devices are products of aggressive CMOS scaling. Technology scaling in semiconductor industry is mainly driven by corresponding improvements in optical lithography technology. Photolithography, the art used to create patterns on the wafer is the heart of the semiconductor manufacturing process. Lately, improvements in optical technology have been difficult and slow. The transition to deep ultra-violet (DUV) light source (193nm) required changes in lens materials, mask blanks, light source and photoresist. It took more than ten years to develop a stable chemically amplified resist (CAR) for DUV. Consequently, as the industry moves towards manufacturing end-of-the-roadmap CMOS devices, lithography is still based on 193nm light source to print critical dimensions of conman, 32nm and likely 22nm. Sub-wavelength lithography creates a number of printability issues. The printed patterns are highly sensitive to topographic changes due to metal planarization, overlay errors, focus and dose variations, random particle defects to name a few. Design for Manufacturability (DFM) methodologies came into being to help analyze and mit-" @default.
• W1513422997 created "2016-06-24" @default.
• W1513422997 creator A5008433592 @default.
• W1513422997 date "2011-01-01" @default.
• W1513422997 modified "2023-09-24" @default.
• W1513422997 title "Managing lithographic variations in design, reliability, & test using statistical techniques" @default.
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