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- W1518385254 abstract "A small footprint active clamp design with low voltage CMOS and high voltage BJT components in complementary BiCMOS process is proposed, analyzed by mixed-mode simulation and experimentally validated. The new clamp is composed from stacked NMOS driver and power BJT to achieve appropriate voltage tolerance. Both NPN and PNP-based versions of the clamp are compared to the stacked NMOS clamp." @default.
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- W1518385254 date "2011-10-17" @default.
- W1518385254 modified "2023-09-23" @default.
- W1518385254 title "Active clamp implementation in complementary BiCMOS process with high voltage BJT devices" @default.
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