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- W1525522186 abstract "In this paper we evaluate and improve different vector implementation techniques of AES-based designs. We analyze how well the T-table, bitsliced and bytesliced implementation techniques apply to the SHA-3 finalist Grostl. We present a number of new Grostl implementations that improve upon many previous results. For example, our fastest ARM NEON implementation of Grostl is 40% faster than the previously fastest ARM implementation. We present the first Intel AVX2 implementations of Grostl, which require 40% less instructions than previous implementations. Furthermore, we present ARM Cortex-M0 implementations of Grostl that improve the speed by 55% or the memory requirements by 15%." @default.
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- W1525522186 date "2013-01-01" @default.
- W1525522186 modified "2023-09-27" @default.
- W1525522186 title "Efficient Vector Implementations of AES-Based Designs: A Case Study and New Implemenations for Grøstl" @default.
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- W1525522186 doi "https://doi.org/10.1007/978-3-642-36095-4_10" @default.
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