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- W1536280495 abstract "This paper shows the full analysis, design and simulation of a 3.3 V CMOS input/output rail to rail or R-R operational amplifier using the design kit for the Synopsys tools. The technology used was CMOS TSMC 0.18µm whose cost is low for academic purposes. This paper details the complementary input stage R-R, the summing circuit and the R-R output stage class AB. At last the final layout and the results of simulation are shown." @default.
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- W1536280495 date "2012-01-06" @default.
- W1536280495 modified "2023-09-26" @default.
- W1536280495 title "DISEÑO DE UN AMPLIFICADOR RIEL A RIEL CON TECNOLOGÍA CMOS 0,18 µm" @default.
- W1536280495 cites W1502034973 @default.
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