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- W1539736039 abstract "In this paper, a method for the systematic generation of executing programs for processor element of parallel ASIC or FPGA-based systems like processor arrays is proposed. In this method, each processor element of an array has separate control unit and is controlled in an autonomous way, based on the executing program received from the host computer before computations. This method allows also to derive the VHDL-description of all processor element control units in the behavioral style.KeywordsControl UnitField Programmable Gate ArrayDependence GraphLoop NestProcessor ArrayThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves." @default.
- W1539736039 created "2016-06-24" @default.
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- W1539736039 date "2002-01-01" @default.
- W1539736039 modified "2023-09-27" @default.
- W1539736039 title "Systematic Generation of Executing Programs for Processor Elements in Parallel ASIC or FPGA-Based Systems and Their Transformation into VHDL-Descriptions of Processor Element Control Units" @default.
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- W1539736039 doi "https://doi.org/10.1007/3-540-48086-2_30" @default.
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