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- W1544332972 abstract "In this paper we propose an on-line self-test architecture for hardware implementations of Advanced Encryption Standard (AES). The solution assumes a parallel architecture and exploits the inherent spatial replications of this implementation. Because Substitution boxes (S-Box) represent the largest hardware in this architecture, we focus on faults affecting these S-Boxes and propose a trade-off between hardware overhead and fault latency. We show that our solution is very effective for on-line fault detection while keeping the area overhead very low. Moreover, it does not weak the device with respect to side-channel attacks based on power analysis." @default.
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- W1544332972 date "2008-11-12" @default.
- W1544332972 modified "2023-09-28" @default.
- W1544332972 title "A Reliable Architecture for Substitution Boxes in Integrated Cryptographic" @default.
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