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- W1544459098 abstract "A novel soldering technique for connecting input/output (I/O) pins on the back side of the wafer is described. After the preforms between the through-holes etched into the silicon wafer and the I/O pins are melted in vacuum (about 1 torr), the vacuum is released to make the solder flow into the through-hole area, soldering the I/O pins to the metallization layer on the active devices. This process provides reliable and highly conductive metal interconnection through the wafer because a virtually voidless solder layer is formed without the use of flux. The percentage of void-free through-holes is 95%, and the resistance of each through-hole is 10-15 m/spl Omega/. It is demonstrated that this method provides ideal interconnections for hybrid wafer-scale integration. >" @default.
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- W1544459098 date "2002-12-30" @default.
- W1544459098 modified "2023-09-25" @default.
- W1544459098 title "Feasibility study on through-wafer interconnecting method for hybrid wafer-scale-integration" @default.
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- W1544459098 doi "https://doi.org/10.1109/ectc.1993.346701" @default.
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