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• W1545023196 abstract "An 8-bit, 40 MS/s, switched current pipeline analog-to-digital converter is presented. It employs a multiplexed architecture with tapered bit stage design and enhanced two-step circuit techniques. Implemented in a 3.3 V, 0.35 /spl mu/m CMOS process but operating internally from a 1.9 V supply, it achieves 6.4 effective number of bits and a resolution bandwidth of 5 MHz with a dissipation of 60 mW." @default.
• W1545023196 created "2016-06-24" @default.
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• W1545023196 date "2002-11-13" @default.
• W1545023196 modified "2023-09-26" @default.
• W1545023196 title "A low voltage 8-bit, 40 MS/s switched-current pipeline analog-to-digital converter" @default.
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• W1545023196 doi "https://doi.org/10.1109/iscas.2001.921920" @default.
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