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• W1549920774 abstract "Exponential growth in leakage power density with physical scaling is driving ULSI technology towards innovative device architectures. Double-gate CMOS (DGCMOS), achieved through use of the Delta Device (D.Hisamoto et al, IEDM 1989, p.833-836), or FinFET (X.Huang et al, IEDM 1999, p.67-70), provides both a tactical solution to the gate-leakage challenge and a strategic scaling advantage. FinFET fabrication is very close to that of the conventional CMOS process, with only minor disruptions, yielding the potential for a rapid deployment to manufacturing. Planar circuit designs have been converted to FinFET-DGCMOS without disruption to physical area." @default.
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• W1549920774 date "2004-02-03" @default.
• W1549920774 modified "2023-10-18" @default.
• W1549920774 title "Scaling beyond the 65 nm node with FinFET-DGCMOS" @default.
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• W1549920774 doi "https://doi.org/10.1109/cicc.2003.1249415" @default.
• W1549920774 hasPublicationYear "2004" @default.
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