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- W1553746189 abstract "Firstly, in this paper, the topological structure and the principle of the three-level NPC inverter are analyzed, by using the SVPWM, controlling the mid-point drift in voltage-dividing capacitor, then/and generating the three-level voltage output. Secondly, the method of the combined programming of DSP and FPGA is used for the experimental platform, which realizes the reasonable distribution and utilization of the hardware resources, and increases the speed and accuracy of the control. Finally, the feasibility of the method is proved by the simulation and experiment." @default.
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- W1553746189 date "2011-09-01" @default.
- W1553746189 modified "2023-09-26" @default.
- W1553746189 title "Notice of Retraction Design and realization of three phase three-level inverter based on DSP&FPGA" @default.
- W1553746189 doi "https://doi.org/10.1109/iceceng.2011.6057298" @default.
- W1553746189 hasPublicationYear "2011" @default.
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