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- W1558100611 abstract "A phase-locked loop (PLL) in silicon over insulator (SOI) for clock generation for CMOS processors can be used on all chips in a mainframe nest which constitute up to a 10-way computer. Test site measurements show a continuous range of operation between 65 MHz and 1.3 GHz with 12 ps steady-state jitter." @default.
- W1558100611 created "2016-06-24" @default.
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- W1558100611 date "2003-01-20" @default.
- W1558100611 modified "2023-09-23" @default.
- W1558100611 title "A SOI specific PLL for 1 GHz microprocessors in 0.25 μm 1.8 V CMOS" @default.
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- W1558100611 doi "https://doi.org/10.1109/isscc.1999.759344" @default.
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