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- W1565577803 abstract "2.4-GHz PMOS low noise amplifiers (LNAs) fabricated in a 0.18-/spl mu/m CMOS process have /spl sim/16 dB transducer power gain and 3.5 dB noise figure (N.F.) at 5.4-mW power consumption, which is /spl sim/3 dB lower and 1 dB higher than those of NMOS LNAs fabricated in the same process. PMOS LNAs have 6-8 dB higher IIP/sub 3/. 2.4-GHz PMOS mixers have 6-dB conversion gain and /spl sim/ 8-dB double side band N.F. at 29-mW power consumption, The gain is /spl sim/ 3 dB lower while the N.F. is slightly lower than those of NMOS mixers. PMOS mixers have about 5-9 dB lower flicker noise. These indicate the feasibility of using PMOS transistors for RF applications, to improve noise isolation without adding any process modifications and cost." @default.
- W1565577803 created "2016-06-24" @default.
- W1565577803 creator A5006686612 @default.
- W1565577803 date "2004-09-28" @default.
- W1565577803 modified "2023-09-24" @default.
- W1565577803 title "Evaluation of utilizing 0.18-μm PMOS transistors in a 2.4-GHz receiver" @default.
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- W1565577803 doi "https://doi.org/10.1109/rfic.2004.1320681" @default.
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