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- W1567655573 abstract "We present a methodology to evaluate performance of the memory hierarchy of PC microcomputers. This methodology is based on synthetic bus traces which allow simulation of the memory hierarchy without having to build a model of the microprocessor. As a result, the simulation is orders of magnitude faster than an instruction level one but the methodology is not valid with a dynamically scheduled superscalar microprocessor." @default.
- W1567655573 created "2016-06-24" @default.
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- W1567655573 date "2002-11-22" @default.
- W1567655573 modified "2023-09-25" @default.
- W1567655573 title "Performance evaluation of the memory hierarchy of a desktop PC using commodity chips with specific traces" @default.
- W1567655573 doi "https://doi.org/10.1109/eurmic.1997.617340" @default.
- W1567655573 hasPublicationYear "2002" @default.
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