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• W1569732957 abstract "Modern networks process and forward an increasingly large volume of traffic and the rate of growth of the traffic often outpaces the improvements in the processor, memory and software technology. In order for networking equipment to maintain an acceptable performance, there is a need for architectural enhancements and novel algorithms to efficiently implement the various network features. In this thesis, we focus on two core network features namely: (i) IP packet forwarding, and (ii) packet content inspection. We thoroughly investigate the existing methods to realize these two features and evaluate their usability on modern implementation platforms like network processors. Afterwards, we introduce a number of novel algorithms which not only improve the performance theoretically, but also better utilize the capabilities available with the modern hardware. The major contributions of this work include the design and architecture of an ASIC to perform longest prefix match operations on packet headers that uses substantially less memory, an embedded memory based design for regular expressions based packet content inspection, and a general purpose algorithm to cost-efficiently implement regular expressions signatures used in current security systems. We evaluate the proposed algorithms using network processor platforms and cycle accurate ASIC models, which provides us a first order estimate of the usability of our methods." @default.
• W1569732957 created "2016-06-24" @default.
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• W1569732957 date "2008-01-01" @default.
• W1569732957 modified "2023-09-27" @default.
• W1569732957 title "A thesis on acceleration of network processing algorithms" @default.
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