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- W1570678307 abstract "Part 1 Industrial usage reports I: VEDA 2 ,- power to the protocol designer, L. Doldi and P. Gauthier LOTOS in Alcatel, H. Nirsch and J. Blanchard an experiment in analyzing switch recovery procedures, D. Cohen and N. Dorn. Part 2 Specification: translator tool for ASN.1 into LOTOS, M. Thomas incremental processing of Z specifications, A.M.L. de Vasconcelos and J.A. Mc Dermid. Part 3 Time and performance: queueing network model for Estelle, P. Dembinski a timed LOTOS supporting a dense time domain and including new timed operator, G. Leduc and L. Leonard extending LOTOS towards performance evaluation, C. Miguel et al. Part 4 Verification I: towards efficient parallelization of equivalence checking algorithms, S. Zhang and S.A. Smolka on improving reduced reachability analysis, L. Ciacciari and O. Rafiq design of a formal Estelle semantics for verification, J. Bredereke et al. Part 5 Industrial usage reports II: specification and implementation of an ISDN telephone system using LOTOS, P. Ernberg et al analyzing a space-protocol - from specification simulation to experimentation, C. Jard et al formal specification in the development of industrial applications - subway speed control system, C. da Silva et al. Part 6 Invited presentation: formal methods for actor systems - a progress report, G. Agha. Part 7 Design: protocol design using LOTOS - a critical synthesis of a standardization experience, H. Kremer et al a method for specifying and validating communication protocols in LOTOS, F.J. Carrasco and J.J. Gil using VDM to specify managed object relationship, L.S. Marshall and L. Simon. Part 8 Executing LOTOS: generating transition graphs from LOTOS specifications, G. Karjoth symbolic execution of LOTOS specifications, H. Eertink and D. Wolz goal-oriented execution for LOTOS, M. Haj-Hussein et al. Part 9 True concurrency: bundle event structures - a non-interleaving semantics for LOTOS, R. Langerak a true concurrency semantics for LOTOS, R.J. Coelho da Costa and J.P. Courtiat a constraint-oriented real-time process calculus, C.J. Fidge. Part 10 Testing: test derivation for SDL based on ACTs, F. Kristoffersen et al combination of conformance and interoperability testing, N. Arakawa et al using FDTs in the development of a PICS editor, J.I. Sanz. Invited presentation: the electric power of LOTOS - results of a joint academic/industrial experiment, T. Bolognesi. Part 11 Verification II: generality in design and compositional verification using Tav, A. Borjesson et al verification by consecutive projections, E. Haghverdi and K. Inan shared-state design modulo weak and strong process fairness, K. Stolen." @default.
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- W1570678307 title "Formal description techniques, V : proceedings of the IFIP TC6/WG6.1 Fifth International Conference on Formal Description Techniques for Distributed Systems and Communications Protocol--FORTE 92, Perros-Guirec, France, 13-16 October 1992" @default.
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