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- W1570843733 abstract "A novel on-chip Decoupling Capacitor (Decap) design - Gated Decoupling Capacitor (GDecap) - is proposed to minimize the leakage power dissipation associated with present-day on-chip decoupling capacitors. Experiments on the application of GDecap in an 8-way clock-gated cluster pipeline show that on average, 41.7% Decap leakage power is improved, with only 0.037% worst-case performance degradation, at 70nm technology node. Around 5.36% area overhead in Decap area is incurred, compared to the conventional Decap deployment" @default.
- W1570843733 created "2016-06-24" @default.
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- W1570843733 date "2006-01-18" @default.
- W1570843733 modified "2023-09-25" @default.
- W1570843733 title "Gated decap: gate leakage control of on-chip decoupling capacitors in scaled technologies" @default.
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- W1570843733 doi "https://doi.org/10.1109/cicc.2005.1568783" @default.
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