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- W1572165493 abstract "After designing of Multi-Valued Logic Networks (MVLNs), the resultingcircuits have to be verified to guarantee functional correctness. The mostpromising technique to cope with increasing device sizes are formalmethods. Ordered Multi-Valued Decision Diagrams (OMDDs) have beenproposed for formal verification of MVLNs. But OMDDs are very sensitiveto the chosen variable ordering and several ordering heuristics have beenproposed in the past. The most promising with respect to OMDD sizeare dynamic variable ordering techniques, but these algorithms often cannotbe applied in formal verification approaches due to their long runtimes.Alternatively, static variable ordering heuristics have been developedthat determine an ordering from the circuit topology, but theseheuristics often cannot guarantee good quality.In this paper an evaluation technique is proposed that uses a pool ofstatic variable ordering heuristics. Each heuristic is applied andthe OMDD construction is started until a node or time limit is reached.Then the heuristic performed best so far is selected for the completeconstruction. The choice of the node and time limit allows to smoothlytrade off runtime vs. quality. Experimental results are given todemonstrate the efficiency of the approach. The technique allows to savetime and memory, since only promising orders are considered." @default.
- W1572165493 created "2016-06-24" @default.
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- W1572165493 date "2002-05-15" @default.
- W1572165493 modified "2023-09-26" @default.
- W1572165493 title "Evaluation of Static Variable Ordering Heuristics for MDD Construction" @default.
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