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• W1575843463 abstract "This paper presents an inductorless 0.13- μm CMOS TIA structure that is a modified version of a regulated cascode (RGC) TIA. An immittance converter is incorporated to reduce power consumption while increasing transimpedance gain. Measured 3-dB bandwidth is 7 GHz, sufficient for 10-Gb/s operation, in the presence of 250 fF capacitance at the TIA input, representative of typical CMOS photodiode capacitance. The transimpedance gain of the single-stage TIA is 50 dBΩ, and the group-delay variation is less than ±19 ps over the 3-dB bandwidth. The circuit occupies an active area of 180 μm×90 μm and consumes 7 mW from a 1.5-V supply. The measured average input-referred current noise of the TIA is 31 pA/√{Hz}. Simulations and analysis show that the proposed single-stage TIA architecture is capable of achieving improvement in the transimpedance limit over a single-stage RGC TIA designed for the same data rate and the same input photodiode capacitance. A comparison of measurement results to published TIAs also demonstrates the competitive performance of the proposed TIA in terms of the TIA transimpendance gain, bandwidth, area, and power consumption." @default.
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• W1575843463 date "2015-08-01" @default.
• W1575843463 modified "2023-09-27" @default.
• W1575843463 title "10-Gb/s 0.13-<formula formulatype=inline> <tex Notation=TeX>$mu{rm m}$</tex></formula> CMOS Inductorless Modified-RGC Transimpedance Amplifier" @default.
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• W1575843463 doi "https://doi.org/10.1109/tcsi.2015.2440732" @default.
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