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- W1576827729 abstract "An important problem in real-time DSP (digital signal-processing) systems with highly integrated components is the capability of automatic error detection and correction. The use of residue number arithmetic allows error detection and correction because of its unweighted nature. A single-error-correction procedure is proposed which is based on the use of redundant residue number systems (RRNS) and the base extension operation. The proposed method uses a small decision table and works in parallel mode; therefore it is suitable for high-speed VLSI circuit realization. A parallel architecture which realizes the method is also introduced. >" @default.
- W1576827729 created "2016-06-24" @default.
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- W1576827729 date "2003-01-06" @default.
- W1576827729 modified "2023-09-22" @default.
- W1576827729 title "Parallel error correction algorithm in RNS VLSI digital circuits" @default.
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- W1576827729 doi "https://doi.org/10.1109/icassp.1988.196953" @default.
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