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- W159378234 abstract "In complex, intelligent systems a common requirement is to provide some form of communication between the system and a computer. Whether the purpose is for streaming content, or simply sending blocks of data between the two machines for processing. This paper provides a solution in the form of an IP based Gigabit Ethernet connection with a specially-designed IP layer implemented directly in hardware to facilitate the connection.The IP core was designed in VHDL and after testing and synthesis, the final results show the interface code to use approximately 1000 slices of FPGA lookup tables, running at just over 125 MHz on a Xilinx Spartan 3 FPGA." @default.
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- W159378234 date "2008-05-02" @default.
- W159378234 modified "2023-09-26" @default.
- W159378234 title "Enabling gigabit IP for intelligent systems" @default.
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