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- W1595797488 abstract "In this paper we present an experimental signal processor with a machine architecture designed to support programming in the high level SIgnal-PROcessing-Language SIPROL. Features, that could be used efficiently only by handwritten machine programms were omitted from the design. The system consists of a number of hardware moduls, each of which contributes a part of the total set of functions of the processor. They are connected by a fast bus system. The architecture allows extensions by including additional hardware resources or microprograms. The appropriate translator system is shortly described in the second part of the paper. One part of it, the so-called codegenerator is partially generated automatically from a formal description of the machine architecture level. Modifications of the achitecture - instruction set, register structure etc. - affect only this description; encroachments into the compiler nucleus are not necessary." @default.
- W1595797488 created "2016-06-24" @default.
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- W1595797488 date "2005-03-24" @default.
- W1595797488 modified "2023-09-25" @default.
- W1595797488 title "An extensible high level language signal processor" @default.
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- W1595797488 doi "https://doi.org/10.1109/icassp.1980.1170882" @default.
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