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• W1663058319 abstract "Packet-switched networks-on-chip (NOC) have been advocated as the solution to the challenge of organizing efficient and reliable communication structures among the components of a system-on-chip (SOC). A critical issue in designing a NOC is to determine its topology given the set of point-to-point communication requirements among these components. We present a novel approach to on-chip communication synthesis that is based on the iterative combination of two efficient computational steps: (1) an application of the k-Median algorithm to coarsely determine the global communication structure (which may turned out not be a network after all), and a (2) a variation of the shortest-path algorithm in order to finely tune the data flows on the communication channels. The application of our method to case studies taken from the literature shows that we can automatically synthesize optimal NOC topologies for multi-core on-chip processors and it offers new insights on why NOC are not necessarily a value proposition for some classes of application-specific SOCs." @default.
• W1663058319 created "2016-06-24" @default.
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• W1663058319 date "2006-01-01" @default.
• W1663058319 modified "2023-09-23" @default.
• W1663058319 title "Synthesis of On-Chip Interconnection Structures: From Point-To-Point Links to Networks-on-Chip" @default.
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• W1663058319 doi "https://doi.org/10.7916/d88d07gt" @default.
• W1663058319 hasPublicationYear "2006" @default.
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