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- W1742437987 abstract "The demand for high density and high-speed programming in flash memories has grown because of audio- and video- storage applications. A multilevel technique is the most effective approach to improving memory density, but it requires precise control of a memory cell's Vth that doesn't degrade programming performance. To enable this, we have developed a selective verify scheme for high-speed programming based on simultaneous multilevel programming. A selective verify scheme with asymmetrical cell operation and two-bank operation makes 5-MB/s programming throughput in 3-bit/cell flash memories attainable." @default.
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- W1742437987 date "2002-11-07" @default.
- W1742437987 modified "2023-09-26" @default.
- W1742437987 title "A selective verify scheme for achieving a 5-MB/s program rate in 3-bit/cell flash memories" @default.
- W1742437987 doi "https://doi.org/10.1109/vlsic.2000.852880" @default.
- W1742437987 hasPublicationYear "2002" @default.
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