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• W1752489788 abstract "This paper proposes using a 3-bit ADC to blindly sample the received data from a channel with 20 dB loss at Nyquist at 3x the baud rate. By moving from 2x to 3x sampling, we reduce the required ADC resolution from 5-bit to 3-bit, thereby reducing the overall power consumption by a factor of 2. Measurements from our test chip fabricated in Fujitsu's 65 nm CMOS show a high frequency jitter tolerance of 0.25 UIpp for a 5 Gb/s PRBS31 with a 60 FR4 channel." @default.
• W1752489788 created "2016-06-24" @default.
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• W1752489788 date "2015-06-01" @default.
• W1752489788 modified "2023-09-26" @default.
• W1752489788 title "A 3x blind ADC-based CDR for a 20 dB loss channel" @default.
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• W1752489788 doi "https://doi.org/10.1109/tcsi.2015.2418839" @default.
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