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- W1759455432 abstract "This paper considers a generic approach to enhance traditional runtime verification techniques towards first-order theories in order to reason about data. This allows especially for the verification of multi-threaded, object-oriented systems. It presents a general framework lifting the monitor synthesis for propositional temporal logics to a temporal logic over structures within some first-order theory. To evaluate such temporal properties, SMT solving and classical monitoring of propositional temporal properties is combined. The monitoring procedure was implemented for linear-time temporal logic (LTL) based on the Z3 SMT solver and evaluated regarding runtime performance." @default.
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- W1759455432 date "2014-01-01" @default.
- W1759455432 modified "2023-09-26" @default.
- W1759455432 title "Monitoring Modulo Theories" @default.
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- W1759455432 doi "https://doi.org/10.1007/978-3-642-54862-8_23" @default.
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