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- W1805961731 abstract "The Universal Serial Bus (USB) technology is now becoming an integral part of the personal computer platform. In this paper, the transceiver architecture and circuits are proposed and implemented for USB2 high-speed mode with 480 Mb/s bandwidth. This physical layer of USB2 consists of transmitter, receiver, two envelope detectors and an all-digital clock recovery/data synchronization blocks. It has been implemented with UMC 0.35 /spl mu/m 1P4M 3.3 V CMOS technology and consumes only 156 mW." @default.
- W1805961731 created "2016-06-24" @default.
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- W1805961731 date "2002-11-13" @default.
- W1805961731 modified "2023-09-23" @default.
- W1805961731 title "A serial link transceiver for USB2 high-speed mode" @default.
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- W1805961731 doi "https://doi.org/10.1109/iscas.2001.922172" @default.
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