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- W1828962607 abstract "ABSTRACT This paper presents a python to VHDL compiler. The compiler interprets an algorithmic description of a desiredbehavior written in Python and translate it to VHDL. FPGA combines many benefits of both software and ASICimplementations. Like software, the programmed circuit is flexible, and can be reconfigured over the lifetime of the system. FPGAs have the potential to achieve far greater performance than software as a result of bypassing the fetch-decode-execute operations of traditional processors. and possibly exploiting a greater level of parallelism. This can be achived by using many computational resources at the same time. Creating parallel programs implemented in FPGAs in pure HDL is difficult and time consuming. Using higher level of abstraction and High-Level Synthesis compilerimplementation time can be reduced. The compiler has been implemented using the Python language. This articledescribes design, implementation and results of created tools. Keywords: FPGA, Algorithmic Synthesis, High-Level Synthesis, Behavioral Synthesis, Hot Plasma Physics Experiment, Python, Compiler." @default.
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- W1828962607 date "2015-09-11" @default.
- W1828962607 modified "2023-09-27" @default.
- W1828962607 title "Algorithmic synthesis using Python compiler" @default.
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- W1828962607 doi "https://doi.org/10.1117/12.2205609" @default.
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