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- W1829670691 abstract "The testability of various BiCMOS logic families is examined. For each design style the adequacy of stuck-at and quiescent current testing is explored. It is shown that while stuck-at and I/sub ddq/ testing can cover many faults there are still a large number of faults that are not detectable. Using the results presented the various logic families can be ranked by testability when being evaluated for an application. >" @default.
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- W1829670691 date "2002-12-09" @default.
- W1829670691 modified "2023-09-25" @default.
- W1829670691 title "Test considerations for BiCMOS logic families" @default.
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- W1829670691 doi "https://doi.org/10.1109/cicc.1991.164011" @default.
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