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- W1830936831 abstract "Experimental results are presented for the defect-oriented testing of PLLs using the charge-based frequency measurement BIST technique. Using National Semiconductor Corp.'s 0.25 /spl mu/m CMOS 900 MHz PLL, we demonstrate a low-cost and practical BIST solution. The area overhead is minimized by using the existing PLL circuitry for the BIST structure. The test time is typically 12 /spl mu/sec, significantly faster than conventional testing." @default.
- W1830936831 created "2016-06-24" @default.
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- W1830936831 date "2002-11-13" @default.
- W1830936831 modified "2023-09-22" @default.
- W1830936831 title "Test evaluation and data on defect-oriented BIST architecture for high-speed PLL" @default.
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- W1830936831 doi "https://doi.org/10.1109/test.2001.966705" @default.
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