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- W1834263042 abstract "This paper describes the design of a dual-band, four-mode /spl Delta/-/spl Sigma/ frequency synthesizer for WLAN a,b,g and Bluetooth applications. Integrating both a multi-modulus PLL and a 3/sup rd/ order /spl Delta/-/spl Sigma/ modulator in a single chip, the channel spacing of the RF synthesizer can be as low as 20 kHz and the frequency hopping time is less than 67 /spl mu/sec. A charge pump circuit is proposed to improve its linearity and the matching of the pumping currents. The measured phase noise at 1MHz offset are about -114 dBc/Hz and -116 dBc/Hz respectively at 5 GHz and 2.5 GHz frequency bands. Fabricated in a 0.18-/spl mu/m CMOS process, the chip size is 1.95 mm/sup 2/. The total power consumption is 19.54 mW from a 1.8 V power supply." @default.
- W1834263042 created "2016-06-24" @default.
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- W1834263042 date "2006-07-21" @default.
- W1834263042 modified "2023-09-25" @default.
- W1834263042 title "A Dual-Band Four-Mode ~-~ Frequency Synthesizer" @default.
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- W1834263042 doi "https://doi.org/10.1109/rfic.2006.1651125" @default.
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