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• W183732336 abstract "Test generation for transistor switch faults is considered for nMOS combinational circuits. Examination of fault effects shows that memory and non-digital signals can result. A test strategy that accounts for MOS physical properties such as charge storage and bidirectionality is developed. Abstraction of physical effects using ternary algebra can guarantee the generation of valid tests." @default.
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• W183732336 date "1984-10-16" @default.
• W183732336 modified "2023-09-24" @default.
• W183732336 title "Test generation for MOS circuits" @default.
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