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- W1856150903 abstract "AbstractMultimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is assigned a register only part of the register is used. We propose an instruction set extension to the ARM embedded processor which allows two data items to reside in a register as long as each of them can be stored in 16 bits. The instructions are used by the register allocator to speculatively move the value of an otherwise spilled variable into a register which has already been assigned to another variable. The move is speculative because it only succeeds if the two values (value already present in the register and the value being moved into the register) can be simultaneously held in the register using 16 bits each. When this value is reloaded for further use, an attempt is first made to retrieve the value from its speculatively assigned register. If this attempt succeeds, load from memory is avoided. On an average our technique avoids 47% of dynamic reloads caused by spills.KeywordsPhysical RegisterRegister AllocationEmbed ProcessorInterference GraphSpeculative PassThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves." @default.
- W1856150903 created "2016-06-24" @default.
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- W1856150903 date "2005-01-01" @default.
- W1856150903 modified "2023-09-23" @default.
- W1856150903 title "Speculative Subword Register Allocation in Embedded Processors" @default.
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- W1856150903 doi "https://doi.org/10.1007/11532378_6" @default.
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