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- W1864431427 abstract "Conventional Si/Ge nanocrystal EEPROM devices have several advantages over conventional EEPROM with continuous floating gate. However, to maintain good retention characteristics the programming voltages (write and erase) cannot be scaled down easily. Interface and dopant fluctuations at the Si/Ge nanocrystal interface also cause device design difficulty. We demonstrate for the first time that metal nanocrystal EEPROMs can have much lower programming voltages by careful choice of the metal floating-gate workfunction. The interface fluctuations are at a minimum due to the metal density of states. The retention characteristic for metal nanocrystals is similar to that of Si nanocrystals in view of the Coulomb blockade. Process integration of the metal floating gate on thin tunneling oxide is greatly improved by the self-assembly step of nanocrystal formation. Energy minimization during self assembly will relax the interface stress and stabilize the metal structure to avoid penetration and contamination. Together with Schottky contact injection improvement, the introduction of metal nanocrystals can push deep submicron CMOS and EEPROM scaling for more technology generations." @default.
- W1864431427 created "2016-06-24" @default.
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- W1864431427 date "2002-11-13" @default.
- W1864431427 modified "2023-10-16" @default.
- W1864431427 title "Low programming voltages and long retention time in metal nanocrystal EEPROM devices" @default.
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- W1864431427 doi "https://doi.org/10.1109/drc.2001.937881" @default.
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