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- W1880690296 abstract "An algorithm is developed for the retiming of single phase sequential circuits with level sensitive (transparent) latches. A set of constraints that permit retiming and optimal clock cycle computation are also developed. It is shown that a design with edge-triggered latches may be tested for speed-up using transparent latches. >" @default.
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- W1880690296 date "2002-12-10" @default.
- W1880690296 modified "2023-09-25" @default.
- W1880690296 title "Retiming of circuits with single phase transparent latches" @default.
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- W1880690296 doi "https://doi.org/10.1109/iccd.1991.139850" @default.
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