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• W1885203427 abstract "A low specific on-resistance ( <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=TeX>(R_{{{rm mathrm{{scriptstyle ON}},sp}}}) </tex-math></inline-formula> ) silicon-on-insulator (SOI) p-channel LDMOS (pLDMOS) with an enhanced reduced surface field (RESURF) effect and self-shielding effect of the back-gate (BG) bias is proposed and investigated. It features an oxide trench and the p-drift region surrounding the trench, which is built on the n-SOI layer. In the OFF-state, first, the extended trench gate also acts as a gate field plate; second, the p-drift and the n-SOI layer forms a folded RESURF structure. Both increase the doping dose of the p-drift and modulate electric field (E-field) distribution; third, the oxide trench not only reduces the device pitch but also enhances the E-field strength. All of them result in a low <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=TeX>(R_{rm {scriptstyle {ON,SP}}}) </tex-math></inline-formula> and a high breakdown voltage (BV) with a reduced device pitch. The free charges induced on the SOI/buried oxide (BOX) interface not only enhance the E-field strength in the BOX but also effectively shield the influence of BG bias effect in a wide range. The proposed pLDMOS achieves state-of-the-art improvement in the tradeoff between BV and <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=TeX>(R_{rm {scriptstyle {ON,SP}}}) </tex-math></inline-formula> . Compared with the p-top SOI pLDMOS, the proposed device reduces the <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=TeX>(R_{rm {scriptstyle {ON,SP}}}) </tex-math></inline-formula> by 79% at the same BV. A strong immunity to the BG bias effect is demonstrated and analyzed in detail." @default.
• W1885203427 created "2016-06-24" @default.
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• W1885203427 date "2014-07-01" @default.
• W1885203427 modified "2023-10-16" @default.
• W1885203427 title "A RESURF-Enhanced p-Channel Trench SOI LDMOS With Ultralow Specific on-Resistance" @default.
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• W1885203427 doi "https://doi.org/10.1109/ted.2014.2321146" @default.
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